Contact person: Android USB4 PCIe FPGA Driver

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Location: Tokyo, China

Budget: Recommended by industry experts

Time to start: As soon as possible

Project description:
"I have an FPGA board attached to a Qualcomm SM8650-based Android tablet through a USB4-to-PCIe adapter. The tablet can see the PCIe slot but not the FPGA itself, so the kernel needs a new driver that will let the system enumerate, configure and talk to the board.

I will spell out the exact runtime features I need once development starts, but at minimum the driver must expose reliable low-latency communication and leave enough hooks for any additional self-test or accelerated-processing routines I later request. The board model is not one of the common Xilinx/Intel/Lattice options; I’ll provide the full datasheet, BAR layout and reference HDL so you can map registers, interrupts and DMA correctly. The tablet is running a customized Android build (newer than the standard 13 images), and I can supply the current kernel tree, defconfig and build scripts.

Key expectations
• Clean, well-commented kernel module (and DTS/DTSI edits if required) that compiles inside my AOSP tree for SM8650
• Successful enumeration of the device over the USB4-PCIe path, with working BAR mapping, IRQ handling and user-space access nodes (sysfs, char-dev or similar)
• Step-by-step build and flashing instructions plus a simple test app showing data moving between the tablet and FPGA

I will test on the physical hardware; payment milestones will follow proof of enumeration and then full functional exchange. Feel free to reference any prior work with PCIe, FPGA manager, or Qualcomm downstream kernels when we discuss the approach." (client-provided description)